| ELS-XC2C128 CPLD Board |
I. XC2C128 CPLD( Xilinx CoolRunner CPLD 특징 )
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| - Optimized for 1.8V systems |
| - As fast as 5.7 ns pin-to-pin delays |
| - As low as 13 μA quiescent current |
| - Industry’s best 0.18 micron CMOS CPLD |
| - Optimized architecture for effective logic synthesis |
| - Multi-voltage I/O operation ? 1.5V to 3.3V |
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| - Advanced system features |
| - Optional Schmitt-trigger input (per pin) |
| - Unsurpassed low power management |
| - DataGATE enable (DGE) signal control |
| - Flexible clocking modes |
| - Optional DualEDGE triggered registers |
| - Clock divider (divide by 2,4,6,8,10,12,14,16) |
| -· CoolCLOCK |
| - Mixed I/O voltages compatible with 1.5V, |
| - 2.5V, and 3.3V logic levels |
| - SSTL2-1, SSTL3-1, and HSTL-1 I/O Compatibility |
| II. 사 진 |
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| III. 보드 특징 |
| - XC2C128-CSP132(BGA) 128 매크로 셀 |
| - DC 5V 아답터 및 USB 전원 사용 |
| - Reset 회로 내장 |
| - 4Bit Dip Switch |
| - 4Bit Status LED |
| - 20Mhz 오실레이터 내장 |
| - PCB Size 3.5 X 8.0cm |
| - 확장 콘넥터 20x3x2.54 양쪽 2개 |
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IV. 판매 형태 |
| - 가격 = 30,000원 |
현재위치 : 
